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Systems-on-Chip Design
COE838 / EE8221
B.Eng. 4th Year, MASc/MEng/PhD
Lecture: DCC 204       Lab: ENG412
Gul N. Khan

  Electrical, Computer and Biomedical Engineering
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 Sample-Final Exam

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  • All notices and additional class materials will be posted time to time here on this web-page.
  • The newest messages in the Announcements list are on top.
  • check this web page often, at least twice a week, to be sure that you don't miss anything.

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All notices/announcement will be posted at D2L also.
   Check COE838/EE8221 D2L page often to be sure that you don't miss anything.
  D2L is being used for labs, midterm, project and final exam submission & posting marks
.
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Final Exam is scheduled on Tuesday April 16, 2024 at 12:00noon in rooms VIC201 & 202.
The Final exam is closed book & notes, and it is 120 minutes duration starting at 12:00noon.
The exam will cover all the Lecture materials.
However, there will be more emphasis and questions on the topics covered after the midterm.
Students will be allowed to bring one (Letter size) sheet of self prepared notes in the exam.

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  Midterm Exam is scheduled in Week 6 on Wednesday Feb 14, 2024 during the Lecture time in DCC204.
The Midterm exam is closed book & notes, and it is for 75 minutes duration starting at 8:30AM.
The exam will cover Lectures 1, 2, 3, 4 and part of Lecture 5 (1-36 slides ) on Basics of SoC and IC.
SystemC Quick Reference Card is allowed in the exam. Bring your own hard copy in the midterm.
  There will be no lab session in the first week of Winter 2024.
  
First Lab session will be organized in the 2nd week of Winter 2024 Semester starting Jan. 15, 2024.


 15. (a)  SoC Verification  (b)  UVM (Universal Verification Methodology) Basics
        
down load the whitepaper Trends in Functional Verification: An Industry Study 


 14. Bus and NoC Interconnect Models  lecture notes posted.
 13. SoC CPUs and Processor Selection   lecture notes posted.


 12.  On-Chip Bus-Interconnection Structures   lecture notes posted.
 11. Introduction to Bus-Interconnection  lecture notes posted.


 10. Network-on-Chip Router Micro-architecture Part-2    lecture notes posted.
 9.
Network-on-Chip Interconnection Structures Part-1  lecture notes posted.

 8. Summary of COE838 Course Management  is available
      Summary of EE8221 Course Management  
is available


  7.  SystemC Setup Guide on Windows-10 System with Cygwin64, SystemC 2.3.3.
      
All the required  files for SystemC setup and SystemC Labs are available at D2L

   6.  SoC-Platforms and DE1-SoC Design Methods for SoC Project and Labs   lecture notes posted.
   5.  Basics of SOC and IC    lecture notes posted.
   4.  SystemC based JPEG Implementation  lecture notes posted.
   3. 
Accelerator-based SoCs    lecture notes posted.
   2.  SoC Codesign, CoSpecs and SystemC Overview lecture notes posted. 
   1.  Introduction to System-on-Chip   lecture notes posted.

      DE1-SoC and Android Configuration   details.
      
All the Lab Manuals and Project Details  are posted.

     SystemC on-line Training and Tutorial URL
      SystemC Quick Reference Card
  posted.

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 Instructor: 
  Dr. Gul N. Khan, E-mail: gnkhan@torontomu.ca 
  Office Hours for Consultation:  Wednesday 12:00-1:00PM
  Phone: (416) 979-5000 ext. 556084   URL: http://www.ecb.torontomu.ca/~gnkhan 

  Lab Instructor: Mr. Yoga Suhas Kuruba Manjunath, yoga.kuruba@@torontomu.ca 
                                                                                                                          

  In-Person LABS/PROJECT Venue:
ENG412

  Tentative Course Evaluation and Marking Scheme

  • Labs/Project: 30%
  • Midterm Exam:  25%
  • Final Exam:  45%
  Please Note:
   1. There is 5% per day penalty for late submission of the labs and project.
  
2. All of the required course specific written reports including labs, projects and assignments will be assessed not only on their technical or academic merit, but also on the communication skills of the author as exhibited through these reports.
   3. Midterm exam will also cover the corresponding laboratories to enforce individual lab attempts.