Design and FPGA-based Implementation of Cryptocurrency Mining Techniques

2019 COE Engineering Design Project (GK01)


Faculty Lab Coordinator

Gul Khan

Topic Category

FPGA / Reconfigurable Computing

Preamble

The aim is to accelerate cryptocurrency mining by FPGA-based hardware design and implementation of secure hash functions suitable for cryptocurrency mining. These hash functions are also being employed in data mining and various communication applications. Hardware acceleration of such crypto techniques will enable a faster and efficient cryptocurrency mining. It is beneficial to study the specification of SHA functions, and their hardware design by using an HDL (hardware description language) such as Verilog or VHDL. One can verify the HDL design by using test-bench environment developed in UVM or SystemC. The synthesis of HDL design and its implementation on an FPGA platform need to be performed. It is always useful to compare the efficiency of hardware design of encryption techniques with the software implementation on a high-end CPU.

Objective

FPGA-based hardware design and implementation of cryptocurrency mining related functions.

Partial Specifications

1. Study various encryption techniques and choose a cryptic function for FPGA implementation.
2. Identify the main time-consuming operations in cryptocurrency mining suitable for hardware (FPGA) implementation
3. Use HDL (System-Verilog or VHDL) for FPGA/hardware implementation.
4. Synthesize your HDL design and implement it on the target FPGA platform.
5. Compare the encryption function efficiency with a high-end CPU implementation.

Suggested Approach

1. Study encryption algorithms and other cryptocurrency mining functions.
2. Select and study a few FPGA platforms for the implementation of cryptocurrency mining functions.
3. Study HDL (System-Verilog or VHDL) for RTL (hardware) design of cryptocurrency mining functions.
4. Software Implementation of the selected hash function for multi-core CPU implementation.
5. Design, verify and implement (HDL based) SHA or other encryption algorithms for cryptocurrency mining.
6. Synthesize the HDL design of the cryptocurrency function and execute it on the FPGA platform.
7. Compare the execution with the software implementation on a high-end CPU based system.

Group Responsibilities

1. Study a few FPGA based platforms suitable for implementing encryption algorithms for cryptocurrency mining.
2. Investigate various cryptocurrency mining related functions and choose some suitable function for FPGA implementation.
3. Study and learn an HDL (System-Verilog or VHDL) for hardware design.
4. Implement the cryptocurrency algorithm using C for High-end CPU implementation.
5. Hardware (RTL level) design and implementation of the selected cryptocurrency function using System-Verilog or VHDL.
6. Synthesize and Verify your cryptocurrency algorithm design and implement it for the target FPGA.
7. Compare the cryptocurrency function execution time of your FPGA implementation with the software (CPU) or GPU implementation.

Student A Responsibilities

1. Investigate and study some cryptocurrency mining related functions for implementation.
2. Study a couple of FPGA platforms to implement cryptocurrency mining related functions.
3. Develop the hardware design of an SHA encryption function using System-Verilog or VHDL.
4. Synthesize and verify cryptocurrency related SHA function HDL design by working with Student B and C for target FPGA platform.
5. Compare the cryptocurrency mining related SHA execution time of the hardware (FPGA-based) design with the CPU implementation done by Student D.
6. Assist Student B, C and D and manage the overall project design and implementation.

Student B Responsibilities

1. Investigate some candidate CPU platforms to implement cryptocurrency mining related functions.
2. Improve the cryptocurrency algorithms hardware design (prepared by student A and C) and develop the final HDL design.
3. Synthesize and verify cryptocurrency mining related SHA/encryption HDL design by working with Student A and C for the target FPGA platform.
4. Compare the cryptocurrency mining related SHA execution time of the hardware (FPGA-based) design with the CPU implementation done by Student D.
5. Assist Student A, C and D to manage the overall project design and implementation.

Student C Responsibilities

1. Investigate and study some cryptocurrency mining related functions for implementation.
2. Develop the hardware design of some cryptocurrency mining related function using System-Verilog or VHDL.
3. Synthesize and verify cryptocurrency mining related SHA/encryption HDL design by working with Student A and B for the target FPGA platform.
4. Compare the cryptocurrency mining related SHA execution time of the hardware (FPGA-based) design with the CPU implementation done by Student D.
5. Assist Student A, B and D and manage the overall project design and implementation.

Student D Responsibilities

1. Study some candidate high-end processor PC platforms capable of implementing cryptocurrency mining.
2. Implement the selected cryptocurrency functions in C for a high-end CPU.
3. Participate in the hardware design of cryptocurrency mining.
4. Compare the cryptocurrency mining execution time of the software (CPU) implementation with the hardware (FPGA) design prepared by student A, B and C.
5. Assist Students A, B and C to manage the overall project and implementation.

Course Co-requisites

COE718, COE838

 


GK01: Design and FPGA-based Implementation of Cryptocurrency Mining Techniques | Gul Khan | Saturday August 31st 2019 at 02:35 AM