Design of an NoC based Multimedia System-on-Chip

2019 COE Engineering Design Project (GK02)

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Faculty Lab Coordinator

Gul Khan

Topic Category

Embedded Systems

Preamble

NoC (Network-on-Chip) interconnects have transpired in response to the performance limitations and overhead of bus-based systems in Multi-Processor System-on-Chip (SoC) architectures. NoCs replace the buses with routers and links, where packets communicate simultaneously between on-chip cores to improve overall system performance. A traditional way to alleviate contention in NoC systems is to use virtual channel (VC). In conventional VC method, a physical channel support several virtual channels that are multiplexed across the physical channel. Virtual channels are also used to improve message latency and throughput as well help to avoid deadlock. By allowing messages to share a physical channel, messages can make progress rather than remain blocked, leading to high performance on-chip communication. NoC router is the main IP core that facilitate the implementation of an NoC based SoC for Multimedia applications.

Objective

Investigate, design and develop an NoC based System-on-Programmable Chip (SoPC) to implement a Multimedia application such as JPEG 2000, edge detection, filtering and image enhancement.

Partial Specifications

1. Study of NoC (Network-on-Chip) systems.
2. Design of an NoC router for 2D NoCs.
3. Selection of a typical Multimedia application for implementation.
4.Implement an NoC router IP suitable for 2D Mesh NoCs.
5. Verify the router core by prototyping a Multi-core NoC system using the soft
CPU cores and other accelerator IPs for a multimedia application.

Suggested Approach

1. Study of Soft processor core architectures & programming models, and exploring Altera Cyclone IV/V FPGA based platform for developing embedded NoC systems.
2. Explore various on-chip routing techniques.
3. Investigation of the architecture and specification of various network routers suitable for @D NoC systems.
4. Prototyping an NoC router for 2D-mesh NoC topology.
5. Implementation of the NoC system application by employing the developed network router IP.

Group Responsibilities

1. Study Nios-II (or microblaze, ARM A9) processor architecture and programming model as well as FPGA based (Cyclone) embedded platform for typical Multimedia applications.
2. Investigate the results of the development being carried out by various groups working on an SoC based NoC router IPs.
3. Develop a detailed specification of a 2D-NoC NoC router for some relevant NoC topologies.
4. Design, develop, implement and prototype the NoC router on the FPGA based platform.
5. Verify the NoC router by utilizing it for a 2D NoC prototype.
6. Implement a suitable size 2D-NoC and verify its working for the selected Multimedia Application.

Student A Responsibilities

1. Study some candidate SoPC-based embedded platform for NoC implementation.
2. Investigate and study various 2D NoC router architectures for implementation.
3. Design and write the NoC router specification in a high level language (such as SystemC) .
4. Develop the network router for NoC by working with Student B.
5. Assist Student B, C and D and manage the overall project design and implementation.

Student B Responsibilities

1. Investigate some candidate Nios-II/microblaze/ARM-A9 processor-based embedded platforms. 2. Improve the router specification (prepared by student A) and develop the NoC router along with student A.
3. Overall design of an NoC system by employing the NoC router for the multimedia application with the help of student C.
4. Assist Student A, C and D to manage the overall project design and implementation.

Student C Responsibilities

1. Investigate some candidate Nios-II/microblaze/ARM-A9 processor-based embedded platforms. 2. Improve the router specification (prepared by student A and B) .
3. Design and write the NoC specification in a high level language (such as SystemC) by working on the router specification developed by student A and B.
4. Support student A and B in the overall design of a 2D NoC system.
5. Assist Student A, B and D to manage the overall project design and implementation.

Student D Responsibilities

1. Study and select some candidate multimedia applications for NoC based SoC implementation.
2. Study some multi-core embedded platforms available for multimedia applications.
3. Employ the simple NoC router design to establish communication between routers.
4. Design and establish communication in-between CPU (source and destination) cores for multimedia application.
5. Assist Student A, B and C to manage the overall project design and implementation.

Course Co-requisites

COE718, COE838