Network-on-Chip based SoC for Implementing Image Processing Applications

2022 COE Engineering Design Project (GK06)


Faculty Lab Coordinator

Gul Khan

Topic Category

FPGAs and Reconfigurable Computing

Preamble

NoC (Network-on-Chip) interconnects have transpired in response to the performance limitations and overhead of bus-based on-chip system (SoC) architectures. NoCs replace the buses with routers and links, where multiple packets can travel concurrently between on-chip cores to improve overall system performance. A traditional way to alleviate contention in NoC systems is to use virtual channels (VCs). In conventional VCs, several virtual channels multiplex across the physical channel. VCs are also used to improve latency and throughput as well as they help to avoid deadlock. By allowing messages to share a physical channel, data can make progress rather than remain blocked, leading to high performance on-chip communication. NoC router is the main IP core that facilitate the implementation of an NoC based SoC. For rapid NoC implementation various NoC simulators are being employed. In this project NOXIM, an NoC simulator can be employed to configure an NoC based SoC for implementing various imaging applications such as edge detection, filtering, and image enhancement.

Objective

Investigate, design, and simulate an NoC based System-on-Chip (SoC) to implement imaging application such as edge detection, image filtering and enhancement.

Partial Specifications

1. Study of NoC (Network-on-Chip) systems employed in SoCs.
2. Investigate and study NoC simulators such as NOXIM.
3. Selection of a typical image processing application, such as edge detection, filtering, or image enhancement for implementation.
4. Develop and simulate a suitable 2D Mesh NoC to implement the image processing application.
5. Parallel implementation of the selected imaging application.
5. Verify and prototype a multi-core NoC system simulator employing CPU cores and other accelerators for the imaging application.

Suggested Approach

1. Study and investigate various NoC simulators for developing the NoC based SoC.
2. Explore various on-chip routing techniques and routers suitable for 2D mesh NoC systems.
3. Selection of a typical imaging application, such as edge detection, image filtering or enhancement for implementation.
4. Parallel implementation of the selected imaging application using C++, SystemC or System Verilog.
5. Prototype 2D-mesh NoC using an NoC simulator such as NOXIM.
6. Implementation of the selected imaging application for the NoC designed and simulated in step 5.

Group Responsibilities

1. Study programming model as well as FPGA-based SoC platforms suitable to implement NoC for imaging applications.
2. Study and investigate NoC related developments by various research groups working on NoC simulation such as NOXIM.
3. Develop a detailed specification of 2D-NoC suited to SoCs for imaging applications.
4. Design, develop, simulate, and prototype the NoC router for 2D mesh NoC using NOXIM or other NoC simulators.
5. Verify the simulated 2D-NoC by implementing a small image filtering application.
6. Choose a candidate multimedia application such as edge detection, filtering, or image enhancement for NoC based implementation.
7. Implement a suitable size 2D NoC and verify its working for the selected imaging application.

Student A Responsibilities

1. Study some candidate NoC-based embedded SoC to implement an imaging application.
2. Investigate and study various NoC simulators such as NOXIM to prototype a 2D NoC.
3. Design and write the NoC specification in a suitable language (such as C++ or SystemC).
4. Develop, simulate, and prototype a 2D NoC using NOXIM or any other NoC simulator by working with Student B.
5. Collaborate with Students B, C and D and manage the overall project design and implementation.

Student B Responsibilities

1. Study some candidate NoC-based embedded SoC to implement an imaging application.
2. Investigate and study various NoC simulators such as NOXIM to prototype a 2D NoC.
3. Improve the NoC specification (prepared by student A).
4. Overall design and simulation of an NoC system by employing the NoC simulator for the selected imaging application with the help of other students.
4. Collaborate with Students A, C and D to manage the overall project design and implementation.

Student C Responsibilities

1. Study programming model as well as FPGA-based SoC platforms suitable to implement some typical image processing applications.
2. Improve the 2D NoC specification (prepared by student A and B).
3. Support other students in the overall design and simulation of a 2D NoC system.
4. Overall design and simulation of an NoC system by employing an NoC simulator for the imaging application with the help of students A, B and D.
5. Collaborate with Students A, B and D to manage the overall project design and implementation.

Student D Responsibilities

1. Study and select some candidate imaging applications for NoC based SoC implementation.
2. Study some FPGA-based SoC platforms available.
3. Employ the simulated 2D NoC to establish communication between various routers in the NoC.
4. Design and establish communication in-between (source and destination) cores for the imaging application.
3. Collaborate with Students A, B and C in the overall design and simulation of a 2D NoC system.
4. Overall design and simulation of the NoC system for the selected imaging application with the help of student A, B and C.

Course Co-requisites

COE718, COE838

To ALL EDP Students

Due to COVID-19 pandemic, in the event University is not open for in-class/in-lab activities during the Winter term, your EDP topic specifications, requirements, implementations, and assessment methods will be adjusted by your FLCs at their discretion.

 


GK06: Network-on-Chip based SoC for Implementing Image Processing Applications | Gul Khan | Sunday September 4th 2022 at 05:23 PM