Phone: 416.979.5000 x6083
The founder and principle researcher of OPR-AL, Dr. Reza Sedaghat joined the faculty of the Department of Electrical and Computer Engineering at Ryerson University in 2001. His research program includes the combinatorial optimization problem, layout synthesis, VLSI test, and graph algorithms. Specific areas of his work focus on the theoretical aspects of VLSI design and test, such as the node assignment problem, a model of the Quadratic Assignment Problem. OPR-AL was founded in 2003 with awards from Canada Foundation for Innovation (CFI), Ontario Innovation Trust (OIT), Natural Sciences and Engineering Research Council of Canada (NSERC), and Ryerson University.
- B.Sc., M.Sc. Kassel, Ph.D. Hannover, P.Eng.
- 2001- Present Professor, Ryerson University, Department of Electrical and Computer Engineering
- 2000-01 Assistant Professor, Beheshti University, Tehran
- 1998-99 Nokia Research Center, Bochum, Germany
- 1996-99 Bosch Research Center, Munich, Germany
- 1995-98 Research and Teaching, University of Hannover, Germany
- VLSI design
- digital circuits & systems
- testing & design for testability
- graph algorithms
- Anirban Sengupta, Reza Sedaghat, Pallabi Sarkar, "A Multi Structure Genetic Algorithm for Integrated Design Space Exploration of Scheduling and Allocation in High Level Synthesis for DSP Kernels", Elsevier, Journal of Swarm and Evolutionary Computation, In Press, 2012.
- Anirban Sengupta, Reza Sedaghat, Pallabi Sarkar, "Rapid Exploration of Integrated Scheduling and Module Selection in High Level Synthesis for Application Specific Processor Design", Microprocessors and Microsystems Journal, Elsevier, Volume 36, Issue 4, 2012, pp. 303-314
- Anirban Sengupta, Reza Sedaghat, Zhipeng Zeng, "Rapid Design Space Exploration by Hybrid Fuzzy Search Approach for Optimal Architecture determination of Multi Objective Computing Systems", International Journal on Microelectronics Reliability, Elsevier, Volume 51, Issue 2, pp. 502-512, 2011
- Anirban Sengupta, Reza Sedaghat, "Priority Function Driven Design Space Exploration in High Level Synthesis Based on Power Gradient Technique", Student Forum of 17th IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC 2012), pp: 25, 2012.
- Anirban Sengupta, Reza Sedaghat, "Integrated Scheduling, Allocation and Binding in High Level Synthesis using Multi Structure Genetic Algorithm based Design Space Exploration System", Accepted for Publication in Proceedings of 12th IEEE/ACM International Symposium on Quality Electronic Design (ISQED 2011), pp. 486-494, 2011
- Reza Sedaghat, Anirban Sengupta, "System and method for development of a system architecture", US Patent filed for United Sates Patent and Trademark Office (USPTO), 2013
- Reza Sedaghat, Anirban Sengupta, "System and Methodology for Development of System Architecture", US Patent granted for United Sates Patent and Trademark Office (USPTO), 2012.
- Reza Sedaghat, Anirban Sengupta, "A Fast Multi Objective Design Space Exploration approach with a new High Level Synthesis design flow using Priority Factor method for ASIC's" , 2010, Accepted by MARS Innovation (Govt. of Canada) for Commercialization and Patent Processing, Reference #: MI-2010-094
- Reza Sedaghat, Anirban Sengupta, "A Fast Multi Objective Design Space Exploration approach using Fuzzy Searching Method in High Level Synthesis for ASIC's", 2010, Accepted by MARS Innovation (Govt. of Canada) for Commercialization and Patent Processing, Reference #: MI-2010-095