Andy G. Ye


Assistant Professor
Department of Electrical and Computer Engineering
Ryerson University
350 Victoria Street
Toronto, Ontario
Canada M5B 2K3
Tel: (416) 979-5000 x4901
Fax: (416) 979-5280
Email: aye at ee . ryerson . ca

Biography:

Andy Gean Ye received his Ph.D. degree in Computer Engineering from the University of Toronto in 2004. He also received his B.A.Sc. and M.A.Sc. degrees from the same university in 1996 and 1999, respectively. In 1996, he graduated first in class in the Engineering Science program; and from 1999 to 2000, he participated in the development of the Ultragizmo board for the University of Toronto Undergraduate Microprocessor Laboratory.

 

His research interests include Field-Programmable Gate Array (FPGA) architectures, Computer-Aided Design (CAD) tools for FPGAs, logic synthesis, and hardware implementation of computer graphics algorithms.


Research Projects:

·       Multi-Bit Field-Programmable Gate Array (MB-FPGA) — An FPGA architecture specially designed for the area-efficient implementation of datapath circuits

·       A complete Computer-Aided Design (CAD) flow for capturing and implementing datapath regularity on the MB-FPGA architecture

·       Coming Soon!

·       The complete MB-FPGA architectural specification

·       Datapath-oriented placement and routing tools for the MB-FPGA architecture

·       Synergy: A complete set of tools for manipulating hierarchical netlists of look-up tables


Research Interests:

·       Field-Programmable Gate Array (FPGA) architectures

·       Computer-Aided Design (CAD) tools for FPGAs

·       Logic synthesis

·       Hardware implementation of digital communication algorithms

·       Hardware implementation of computer graphics algorithms

·       Very Large Scale Integrated (VLSI) circuit design

·       CAD tools for VLSI circuit design

·       Computer architecture


Current Graduate Students:

·       Phoebe Ping Chen (M.A.Sc.)

·       Sebastian Ip (M.A.Sc.)

·       Omesh Mutukuda (M.A.Sc.)

·       Prabhleen Kalkat (M.A.Sc.)

·       Sang-Joon Lee (M.Eng.)

 


Former Graduate Students:

·       Theepan Moorthy (M.A.Sc. Thesis): Currently a Ph.D. Candidate at UBC

·       Chen Bin Dai (M.Eng.)

·       Walid El-Mestrah (M.Eng.)

·       Ganendran Narasingavel (M.Eng.)

 


Publications:

Journal Papers

·       Ping Chen and Andy Ye, "The Effect of Multi-Bit Correlation on the Design of Field-Programmable Gate Array Routing Resources," To Appear in IEEE Transactions on Very Large Scale Integration Systems. [PDF]

·       Andy Ye, "Using the Minimum Set of Input Combinations to Minimize the Area of Local Routing Networks in Logic Clusters Containing Logically Equivalent I/Os in FPGAs," To Appear in IEEE Transactions on Very Large Scale Integration Systems. [PDF]

·       Andy Ye and Jonathan Rose, "Using Bus-Based Connections to Improve Field-Programmable Gate-Array Density for Implementing Datapath Circuits," IEEE Transactions on Very Large Scale Integration Systems, Vol. 14, No. 5, May 2006, pp. 462-473. [PDF]

·       Andy Ye and Jonathan Rose, "Measuring and Utilising the Correlation Between Signal Connectivity and Signal Positioning for FPGAs Containing Multi-Bit Building Blocks," IEE Proceedings Computers & Digital Techniques, Vol. 153, No. 3, May 2006, pp. 146-156. [PDF]

Refereed Publications in Conferences

·       Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Ye, Wei Mark Fang, and Jonathan Rose, "VPR 5.0: FPGA CAD and Architecture Exploration with Single-Driver Routing, Heterogeneity and Process Scaling," Proceedings of the 2009 ACM/SIGDA 17th International Symposium on Field-Programmable Gate Arrays, Monterey, California, February 2009, pp. 133-142. [PDF]

·       Theepan Moorthy and Andy Ye, "A Scalable Computing and Memory Architecture for Variable Block Size Motion Estimation on Field-Programmable Gate Arrays," Proceedings of the 2008 IEEE 18th International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, September 2008, pp. 83-88. [PDF]

·       Phoebe Ping Chen and Andy Ye, "The Effect of Sparse Switch Patterns on the Area Efficiency of Multi-Bit Routing Resources in Field-Programmable Gate Arrays," Proceedings of the 2008 IEEE 18th International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, September 2008, pp. 423-430. [PDF]

·       Theepan Moorthy and Andy Ye, "A Scalable Architecture for Variable Block Size Motion Estimation on Field-Programmable Gate Arrays," Proceedings of the 2008 IEEE 16th Canadian Conference on Electrical and Computer Engineering, Niagra Falls, Canada, May 2008, pp. 1303-1308. [PDF]

·       Andy Ye and Jonathan Rose, "Measuring and Utilizing the Correlation Between Signal Connectivity and Signal Positioning for FPGAs Containing Multi-Bit Building Blocks," Proceedings of the 2005 IEEE 15th International Conference on Field Programmable Logic and Applications, Tampere, Finland, August 2005, pp. 159-166. [PDF]

·       Andy Ye and Jonathan Rose, "Using Bus-Based Connections to Improve Field-Programmable Gate Array Density for Implementing Datapath Circuits," Proceedings of the 2005 ACM/SIGDA 13th International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February 2005, pp. 3-13. [PDF]

·       Andy Ye and Jonathan Rose, "Using Multi-Bit Logic Blocks and Automated Packing to Improve Field-Programmable Gate Array Density for Implementing Datapath Circuits," Proceedings of the 2004 IEEE Third International Conference on Field-Programmable Technology, Brisbane, Australia, December 2004, pp. 129-136. [PDF]

·       Andy Ye, Jonathan Rose, and David Lewis, "Architecture of Datapath-Oriented Coarse-Grain Logic and Routing for FPGAs," Proceedings of the 25th IEEE Custom Integrated Circuits Conference 2003, San Jose, CA, September 2003, pp. 61-64. [PDF]

·       Andy Ye, Jonathan Rose, and David Lewis, "Synthesizing Datapath Circuits for FPGAs with Emphasis on Area Minimization," Proceedings of the 2002 IEEE First International Conference on Field-Programmable Technology, Hong Kong, December 2002, pp. 219-226. [PDF]

·       Andy Ye and David M. Lewis, "Procedural Texture Mapping on FPGAs," Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February 1999, pp. 112-120. [PDF] (Colour Version [PDF])

Refereed Publications in Workshops

·       Sebastian Ip, Andy Ye, and Guy Lemieux, "Serial Routing Architecture for FPGAs," Ryerson Innovations Symposium, Toronto, Ontario, 2009.

·       Andy Ye and David M. Lewis, "Procedural Texture Mapping Using the Transmogrifier-2," Micronet Conference, Ottawa, Ontario, 1999. [PDF]

·       Andy Ye and David M. Lewis, "Procedural Texture Mapping Using Transmogrifier-2: An Initial Study," University of Toronto Field Programmable Gate Array Research Retreat, Toronto, Ontario, June 1997.

Course Materials

·       Vincent C. Gaudet, Andy Ye, David M. Lewis, and Fred Aulich, "University of Toronto Ultragizmo Board: Tutorials, Experiments, and Laboratory Notes Version 3," Lab Manual, Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, 2000. [The Ultragizmo Manual]

Invited Talks

·       Andy Ye, "Using the Minimum Set of Input Combinations to Minimize the Area of Local Routing Networks in Logic Clusters Containing Logically Equivalent I/Os in FPGAs," University of Toronto FPGA Research Seminar, Toronto, Ontario, October 15, 2009.

·       Sebastian Ip, Andy Ye, and Guy Lemieux, "Serial Routing Architecture for FPGAs," University of Toronto FPGA Research Seminar, Toronto, Ontario, April 9, 2009.

·       Phoebe Ping Chen and Andy Ye, "FPGA Routing Architectures for Datapath Circuits," University of Toronto FPGA Research Seminar, Toronto, Ontario, May 15, 2008.

·       Theepan Moorthy and Andy Ye, "FPGA Hardware Acceleration for H.264 Motion Estimation," University of Toronto FPGA Research Seminar, Toronto, Ontario, April 17, 2008.

·       A. Ye and J. Rose, "Using Bus-Based Connections to Improve FPGA Density for Implementing Datapath Circuits," Connections 2005 Research Review, University of Toronto, Toronto, Ontario, June 2005.

·       Andy Ye, Jonathan Rose, and David M. Lewis, "Field-programmable Gate Array Architectures and Algorithms Optimized for Implementing Datapath Circuits," Xilinx Inc., Toronto, Ontario, February 27, 2004. [PowerPoint]

·       Andy Ye, Jonathan Rose, and David M. Lewis, "Architecture of Datapath-Oriented Coarse-Grain Logic and Routing for FPGAs," Altera Corp., Toronto, Ontario, October 9, 2003. [PowerPoint]

·       Andy Ye, Jonathan Rose, and David M. Lewis, "Architecture of Datapath-Oriented Coarse-Grain Logic and Routing for FPGAs," Xilinx Inc., Toronto, Ontario, July 2003. [PowerPoint]

·       Andy Ye, David M. Lewis, and Jonathan Rose, "Synthesizing Datapath Circuits for FPGAs with Emphasis on Area Minimization," Xilinx Inc., Toronto, Ontario, July 2002. [PowerPoint]

·       Andy Ye and David M. Lewis, "Procedural Texture Mapping Using FPGAs," ATI Technologies Inc., Thornhill, Ontario, August 1997. [PDF]

Thesis and Technical Reports

·       Andy Ye (supervised by Jonathan Rose and David Lewis), "Field-Programmable Gate Array Architectures and Algorithms Optimized for Implementing Datapath Circuits," Ph.D. Thesis, Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, November 2004. [PDF]

·       Andy Ye, "Ph.D. Progress Report --- Report #3," Ph.D. Thesis Monitoring Report, Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, May 2003. [PDF]

·       Andy Ye, "Ph.D. Progress Report --- Report #2," Ph.D. Thesis Monitoring Report, Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, May 2002. [PDF]

·       Andy Ye, "Ph.D. Progress Report --- Report #1," Ph.D. Thesis Monitoring Report, Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, August 2001. [PDF]

·       Andy Ye, David M. Lewis, "Ph.D. Thesis Proposal: Routing Architecture and Place and Route Tools for DP-FPGA," Ph.D. Thesis Proposal, Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, July 2000. [PDF]

·       Andy Ye (supervised by David M. Lewis), "Procedural Texture Mapping on FPGAs," M.A.Sc. Thesis, Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, 1999. [PDF]

·       Andy Ye (supervised by Raymond H. Kwong), "Analyzing and Designing Linear Quadratic Gaussian Controllers for a Dual Link Flexible System," B.A.Sc. Thesis, Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, 1996.


Courses that I teach:

·       EE8603 Special Topics in Computer Engineering: FPGA Architectures

·       COE538 Microprocessor Systems

·       ELE202 Electric Circuits Analysis

 


FPGA Related Conferences

·       ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

·       International Conference on Field-Programmable Logic, Reconfigurable Computing, and Applications

·       IEEE International Conference on Field-Programmable Technology