Course Outline

  Lecture Notes

  Labs-Projects

  Support Material

  Problem Sets

  Sample-Mid-term Exam

  Sample-Final Exam

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 Objective:

 This course covers the basics of embedded system organization, hardware-software codesign, system on programmable-chip technologies and real-time systems. It provides the advance knowledge required for embedded system development, fault-tolerant techniques applicable to embedded systems and real-time operating systems. The students will be able to grasp the main principles of hardware-software codesign. Embedded system co-specification, partitioning, co-simulation, co-verification and integration are the main phases of hardware software codesign that will be studied in the course. A specification language (SystemC, etc.) will be employed to present a unified view of the embedded systems. Hardware-software codesign tools will be introduced and various applications’ case studies. State of the art embedded system partitioning techniques will be studied. 

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  or an earlier 2008 edition of the book by W. Wolf

  Reference Books
 1.  SystemC: From the Ground Up, 2nd Edition, D.C. Black, J Donovan, B. Bunton, A. Keist, Springer 2010 
  ISBN 978-0-387-69958-5. 

  2. Z. Navabi, Embedded ore Design with FPGAs, McGraw-Hill 2007,  ISBN 978-0-07-147481-8 or  ISBN 0-07-147481-1 

  3. Alan Burns and Andy Wellings, Real-time Systems and Programming Languages, Addison-Wesley 2001, 
  ISBN 0 201 72988 1 

  The instructor will identify some relevant articles from professional magazines. 

 Instructors 
  Dr. Gul N. Khan Phone #: (416) 979-5000 ext. 6084 
  Office Hours for Consultation: Friday 11:00AM to 12:10PM or by Appointment. Office: ENG448 
  E-mail: gnkhan@ee.ryerson.ca   URL:- http://www.ee.ryerson.ca/~gnkhan 

  Lab Instructor: Masoud Oveis Gharan,     E-mail: moveisgh@ee.ryerson.ca
                             LABS Venue ENG408 

 Course Evaluation and Marking Scheme

        Labs: 15% 
        Project: 20% 
        Midterm Exam:  25% (Friday, Oct 19th, 2012) 
        Final Exam:  40% 

 Please Note:
          1. There is 5% per day penalty for late submission of the labs and project.

2. All of the required course specific written reports including labs, projects and assignments will be assessed not only on their technical or academic merit, but also on the communication skills of the author as exhibited through these reports.
3. In order to achieve a passing grade in the course, the student must pass both the theory and laboratory components. 
4. Midterm exam will also cover the corresponding laboratories to enforce individual lab attempts.

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