Roadmap to Version 1.0
I hope to release Version 1.0 before December 1, 2002.
The Version 1.0 release should support:
* Bug-free simulation engine.
* Support for Ryerson eebot.
* User/System configuration mechanisms.
* Most (but NOT all) internal device registers.
Alas, there are several requirments:
* Fixing low-level bugs (e.g. in the simulation engine and devices)
* Simulating eebot in a useful fashion
* Setting configuration information (memory map, devices and UI's)
at runtime.
* Making the User Interfaces more robust.
* Finishing the "Technical Details" document describing the
simulation engine.
Version 0.98 Information
Changes since Version 0.97
Summary
The main goal of this version is to ensure that previous Ryerson
labs work under the simulator.
Details
- Interrupts (MAJORBUG/ENGINE):
- Fixed (maybe).
- JSR foo,Y (BUG/ENGINE):
- Indexed addressing (y) did not work. Fixed.
- LABS added (FEATURE/GUI):
- Object code for Labs (2002) 1, 2, 3, 4
is now available.
- PORTE added (BUG/Devices and FEATURE/UI):
- Port E is now properly supported.
This was not a simple change. It involved both the
devices
and some user interface code.
Changes since Version 0.96
Summary
This release supports the Buffalo Monitor. There are now
more supported devices and new user interfaces.
Details
- Configuration show(ANNOYANCE/GUI):
- A menu bar command ("Config") shows the memory map.
- Some LCD warnings eliminated (ANNOYANCE/DEVICES):
- Several LCD Control register commands are not implemented
(such as blinking cursor). These commands used to cause a
Warning which the user had to acknowledge. The Warnings have
been removed; however, a message describing the limitation is
printed to stderr. (The major incentive to doing
this is that the Buffalo monitor issues such LCD control
commands on RESET.)
- OPTION register added (BUG/DEVICES):
- The internal device register OPTION exists (but it does
nothing.)
- DIR mode disassembly (BUG/ENGINE):
- Direct addressing mode instructions were not always correctly
disassembled.
- Read Unused Warning (BUG/ENGINE):
- Added.
- UPPER CASE hex numbers (ANNOYANCE/UI):
- Hex numbers now use upper case. For example,
E1FF
instead of e1ff
.
- SCI devices added (BUG/DEVICES)
-
The SCI data and status registers have been added. No
SCI interrupts (yet).
- SCI terminal added (GUI)
-
A terminal emulator that cooperates with the SCI system has
been added. Among other things, this allows interactive
simulation of the Buffalo Monitor.
- Disassembly of some indexed mode instructions fixed
(BUG/ENGINE)
-
- Support for CC X bit(BUG/ENGINE)
-
The Buffalo Monitor exploits non-maskable interrupts (in a
very clever way) to implement single stepping (tracing).
- CC X bit displayed (CHANGE/UI)
-
The state of the X bit is now displayed.
- RUN button now goes forever (ANNOYANCE/UI)
-
In previous versions, the RUN button simulated at full speed
until a breakpoint was reached, the user pushed the
STOP button OR 100,000,000 instructions had been simulated.
The new RUN button does NOT STOP after 100,000,000
instructions; it only stops if a breakpoint is encountered or
the user clicks the STOP button.
- Interrupt sample program (CHANGE/SAMPLES)
-
This simple interrupt-driven sample program has many additional
comments.
- IDIV/FDIV instructions (BUG/ENGINE)
-
Previous versions crashed on "divide by zero". Fixed.
- Trace(x50) (ANNOYANCE/GUI)
-
Previous version did nothing if the current instruction was a
breakpoint. Fixed.
- Timer Output Compare (DEVICES/BUG)
-
Implemented partially. No interrupts yet. Needed for Buffalo.
- CFORC Timer register (DEVICES/BUG)
-
Implemented. Needed for Buffalo.
- UNIMPLEMENTED devices (DEVICES/ANNOYANCE)
-
Implemented. Needed for Buffalo. Like unmapped locations, but
no Warning on read/write.
- Load BUFFALO option (UI/ANNOYANCE)
-
Implemented.
Internal changes
- Configuration:
- Internal refactoring of classes.
- Source code refactoring
- Some of
the source code (especially in the ui package) has been
re-written to respect the differences between "private",
"package", "protected" and "public" methods/variables.
- Use
long
for num cycles
- The total number of simulated bus cycles used to be
maintained as a 32-bit integer which limited simulated time
to about 20 minutes. Changing to 64-bits means the simulation
can go on for centuries.
Changes since Version 0.95
Summary
Annoyances and bugs in the Graphical User Interface are the main
issues addressed in this release.
Details
- Scrolling algorithm changed for Messages/Traces(ANNOYANCE/GUI):
- Scrolling occurs when necessary. This change also
seems to reduce the extraneous/erroneous window contents
(especially when running at full speed); but, alas, bugs still
are present...
- Memory Dump Window removed (ANNOYANCE/GUI):
- The Memory Dump window was difficult to use and
(computationally) expensive. (It significantly slowed down
Single Stepping.) Nonetheless, it was not useless: for
example, I used it
for debugging the simulator. It may even reappear in a future
release.
- Two Memory Dump Windows added (ANNOYANCE/GUI):
- Two 8-byte memory dump panels have been
added. Each one can be edited (starting address and contents.)
The panes are updated after single stepping, loading, tracing or
when a breakpoint is hit; unlike Viewpoints, they are
not continously updated when running at full speed.
The memory dumps are by default initialized at addresses
0x7000 (my preferred starting address for RAM variables) and
0x003A (to see the stack as initialized by the engine or the
Buffalo monitor.)
The visual layout is UGLY. Sorry... but my main concerns are
functionality and correctness, not beauty....
- Trace(x50) command added (ANNOYANCE/GUI):
- The Toolbar now allows tracing 50 instructions with one click.
This similar to sigle stepping 50 times (or less). However, tracing
will stop if a breakpoint is encountered.
- Load Source Warnings (ANNOYANCE/GUI):
- Source code is actually loaded (and parsed) from its
corresponding object (
*.s19
) and listing
(*.lst
) files. If either of these files do not
exist, a warning is displayed.
- Source Load/Unload (BUG/ANNOYANCE/GUI):
- Several fixes:
- You can now unload a previously loaded source code
file.
- If more than one source file is loaded, the source code
window does not stupidly duplicate the previously loaded
files.
- If you attempt to load a source file that is
already loaded, a message is displayed.
- The detail
messages about loading/unloading a source file now correctly
describe the actual file as an
*.lst
file.
- Busy times LCD and ADC (MINOR BUG/DEVICES):
- The "busy times" for the ADC and LCD devices were changed to
128 and 1000 bus cycles respectively.
(Previous versions used much smaller values which was useful
for debugging the simulator itself in single-steps.)
- Statistics display (ANNOYANCE/UI):
- Statistics (number of cycles, etc.) now formatted for
display (eg 242,452,535 instead of 242452535.)
Internal changes
- Messages split to a separate class:
- Internal refactoring of classes.
- NoLSTFileException, NoDuplicateFileException and
NoS19FileException added
- Internal.
- Mnemonics class added
- Internal refactoring. (Used by AbstractUI; used to be
static initialization in AbstractUI.)
- LstLoader class added
- Internal refactoring. (AbstractUI was and is too big.)
Changes since Version 0.94
Summary
This version fixes many bugs in the 6811 simulation engine.
(The most important bugs in previous versions caused some
conditional branches--especially ones involving signed
numbers--to fail.)
The simulator is now based on the 0.99 engine. (I hope
to fix the remaining bugs--which I think are minor--by the next
version.)
There are also changes to the user interface: the write-only
output port (GPOUT mapped to 0x1100) and some of the
PORTA
device (mapped to 0x1000) have been
implemented .
Details
- IDIV and FDIV instructions installed (BUG/ENGINE):
- These instructions have now been
activated. The only remaining unimplemted instruction is
WAI
- Default SP initial value changed (ANNOYANCE/ENGINE):
- Changed to 0x41 (for compatability with the BUFFALO monitor.)
- CC V bit sometimes wrong (BUG/ENGINE):
- Some internal methods (in
AbstractInstruction
)
were changed to fix this bug (which made some conditional
branch instructions behave incorrectly.)
- LDD did not clear CC V bit (BUG/ENGINE):
- Fixed.
- CLRA, CLRB, CLR instructions fixed
(BUG/ENGINE):
- Some condition code bits not properly set. Fixed.
- Illegal op codes don't crash simulator
(BUG/ENGINE):
- Fixed. Disassembled as
ILLEGAL op code
.
- BSET instruction implemented (BUG/ENGINE):
- Goodness gracious...this instruction had not been implemented
at all! (Technical Note: It was simple, but laborious,
to do this. I thought that I had covered all instructions in
at least prototypical terms months ago. Indeed, several
source files were generated automatically. To include the
BSET
I had to implement it--a minute or two. But
I also had to manually edit other database-type files. In all,
it took me about 50 minutes...Lesson: the earlier a bug is
detected, the less time it will take to fix it.)
- Cycle counts (BUG/ENGINE):
- The instructions
ADDD, ASLA, ASLB,ASRA, CLC,
CLRB, CLV, CPD, CPX, CPY,
DAA, DES, INY, LSLB, LSLD, LSRA, LSRB,
SEC,SEV, SUBD, TSTA, TSTB
did not simulate enough idle bus cycles. This
has been fixed. (Otherwise, the instructions did work.)
- DAA instruction (BUG/ENGINE):
- Some problems fixed.
- Help/General (INFO):
- Changed (yet
again!) default size and position of window; changed content of
html files.
- Registers stacked in wrong order on interrupt (BUG/ENGINE):
- Fixed. A curious bug: it was not noticed until I compared
the real 68hc11 with the simulated version. Since the
simulated version both pushed and popped the registers in the
wrong order, it was internally consistent and interrupt code
worked. Sigh...
Fortunately, the fix was simple.
For the very curious, the fix involved 2 methods in the
AbstractInstruction
class (pushALL
and popALL
. The code for
pushALL()
is shown below where the erroneous
implementation is commented out.
// public final void pushAll()
// {
// int retPC = cpu.getPC();
// push8(cpu.getCC());
// push8(cpu.getAccB());
// push8(cpu.getAccA());
// push16(cpu.getIX());
// push16(cpu.getIY());
// push16(retPC);
// return;
// }
public final void pushAll()
{
push16(cpu.getPC());
push16(cpu.getIY());
push16(cpu.getIX());
push8(cpu.getAccB());
push8(cpu.getAccA());
push8(cpu.getCC());
return;
}
- WOM devices (DEVICES):
-
Added support for Write-Only memory locations (such as GPOUT at
location 0x1100 on the Ryerson boards and robot).
- GPOUT (UI/CONFIG):
-
Added the GPOUT memory location to the standard configuration.
- PORTA (UI/CONFIG):
-
Added PORTA to the standard configuration.
Changes since Version 0.93
- LSRB and LSRA instructions (BUG):
- A bug was fixed. (The previous version
did an Arithmetic Left shift!) The bug was pointed out to me
by G. Leask. Thanks Greg...
- More sample programs (INFO):
- The
samples directory now includes programs to exercise the
Analog-to-Digital subsystem (
ex6-adc.asm
) and
simple interrupts using TOF (timer overflow) interrupts
(ex7-interrupt1.asm
.)
- Help/General (INFO):
- Changed default size and position of window; changed content
of html files.
- Brk box changes PC (ANNOYANCE):
- Clicking anywhere in the source code changes the PC
accordingly. This is good. Clicking the Breakpoint box has the
side effect of toggling the breakpoint state for the
corresponding PC value. (This is also good.) But it was
ANNOYING that clicking on the breakpoint box also changed the
PC! This has been fixed. (In short, you can now
set/unset breakpoints in the source window without changing the
PC. If you do want to change the PC, click in any other part of
the Source Code window.)
- TST instruction cycles (ENGINE):
- Previous versions undercounted the number of bus cycles for
these instructions by 2.
- ADC added (DEVICES+GUI):
- The Analog to Digital Converter subsystem (ADC mapped to
addresses 0x1030--0x1034) is now implemented. My students
already require this subsystem and implementing it quickly was
a priority (even more important that fixing other known
bugs...)
However, the ADC implementation is partial. Only single
conversion (not continuous) is supported. The sample file
ex6-adc.asm
provides an example.
- Delta list implementation bug (ENGINE):
- An internal bug related to multiple "things that should
happen" at the "same time" has (I hope) been fixed.
Changes since Version 0.92
- License:
One license (GPL) has been added.
- Config (MINOR):
- The docs say E000--FFFF is defaulted
to ROM; implementation now agrees.
- Engine:
- Some instructions did not include enough idle
cycles; some have been fixed, but others have not.
(Instuctions using Inherent Mode addressing are the main
culprits. Even for instructions that do not add the correct
number of idle cycles, their effects on registers and memory
are (I think) accurate.
- Engine:
- The
swi
instruction is now
implemented. (Note that since this instruction requires an
interrupt vector, ROM is now initialized as follows:
SWI_VECTOR equ $FFF6
SWI_ISR equ $EF80
org SWI_VECTOR
fdb SWI_ISR
org SWI_ISR
stop
-
Bugs/Annoyances
The following things bug or annoy me:
- Refresh after "Run" (BUG):
- The display gets corrupted.
This is embarassing...The current work-around is to is to
minimize and then re-display the sim11 window... (Yes, I think
the problem is related to multi-threading and I am aware of
things like
Swing.Utilites.invokeLater()
;
alas, I have not yet found a simple solution to the problem.)
- Stats hard to read (ANNOYANCE):
- The statistics window contains numbers that are hard to read
(when they are big). Currently, if
345923452
clock
cycles have been simulated, the statistics window displays the
number of cycles (correctly) as 345923452
.
Unfortunately, this is hard to interpret. Does it mean, for
example, about 34 Million cycles or 340 Million cycles? It
would certainly be easier to answer this question if it were
displayed as: 345,923,452
- Warnings (BUG/ANNOYANCE):
- The Warning feature is fundamental to the design of the
simulator. The simulator detects the effects of silly
instructions (e.g. writing to ROM) that the hardware would not
detect. The basic idea is that the simulator can give you MORE
useful information than running the program on real hardware.
Unfortunately, there is currently no user interface to
disable specific warnings. (Alas, if your program gets
itself into an infinite loop of instructions that issue
warnings, your only option is to unceremoniously kill the
simulator.)
Frankly, I think the current behavior is more of an
ANNOYANCE than a BUG. I agree, however, that it is a very
REAL annoyance and, arguably, a real bug.
Missing features
Goodness...there are many!
Some of the ones that I think are particularly important are:
- Timer Output Compare Registers Interrupts(DEVICES):
- Not implemented.
- Timer Input Compare Registers (DEVICES):
- Not implemented.
- Watchpoints (User Interface):
- Unlike Viewpoints, setting a Watchpoint would stop
full-speed simulation (just like a breakpoint) when the contents
changed.
Last modified: Sat Nov 23 08:20:00 Eastern Standard Time 2002