Power-Silicon Efficient SAR Analog-to-Digital Converter for Sensors

2017 ELE Engineering Design Project (FY02)


Faculty Lab Coordinator

Fei Yuan

Topic Category

VLSI

Preamble

Analog-to-digital converters (ADCs) are an essential block of wireless communication systems such as cellular phones and wireless sensors and sensor networks. ADCs are representative mixed-mode systems as both analog and digital circuits co-exist. Although the scaling of CMOS technology has greatly improved the switching time and timing resolution of digital circuits, the performance analog circuits degraded greatly at the same time mainly due to a reduced voltage headroom and worsen linearity. It is highly desirable to have mixed-mode systems such as ADCs realized using digital circuits only such that the full merits of technology scaling such as programmasbility, portability, and immunity to noise and disturbance, to name a few, can be utilized.

Objective

This capstone design project will design a low-power low-silicon consumption all-digital successive approximation register (SAR) analog-to-digital converter for wireless sensors. The ADC will be designed in a 65 nm CMOS technology with full silicon realization (layout) .

Partial Specifications

An all-digital successive approximation analog-to-digital converter for wireless sensor applications is to be designed in a 65 nm CMOS technology. Time-mode approach will be used to implement the ADC. The ADC should have 8 bits with fast conversion, an ultra-low level of power consumption, and a small silicon area.

Suggested Approach

- Thoroughly study the principle of conventional SAR ADCs.
- In-depth understanding of time-mode SAR ADCs.
- Identify a wireless sensor application so as to determine the specifications of the SAR ADC.
- The ADC should have 8-bit resolution, fast conversion, ultra-low power consumption, and a small silicon area.

Group Responsibilities

1. Thorough understand the principle of SAR ADCs. 2. Identify a wireless sensor application so as to determine the design specifications of the ADC.

Student A Responsibilities

(i) Acquire the in-depth knowledge of time-mode signal processing. (ii) Design, analyze, simulate, and quantify a voltage-to-time converter (VTC). (iii) Design, analyze, simulate, and quantify the time conparator. (vi) Silicon implementation of the VTC and time comparator (layout).

Student B Responsibilities

(i) Acquire the in-depth knowledge of time-mode signal processing. (ii) Design, analyze, simulate, and quantify successive approximation register (SAR) and associated logic. (iii) Design, analyze, simulate, and quantify the switching network. (iv) Silicon implementation of the SAR and associated logic, and switching network (layout).

Student C Responsibilities

(i) Acquire the in-depth knowledge of time-mode signal processing. (ii) Design, analyze, simulate, and quantify the digital-to-time converter (DAC). (iii) Silicon implementation of the DAC (layout). (iv) Perform timing analysis of the entire ADC to ensure it meets design specifications.

Course Co-requisites

ELE724

 


FY02: Power-Silicon Efficient SAR Analog-to-Digital Converter for Sensors | Fei Yuan | Friday September 15th 2017 at 03:19 PM