Gul Khan
FPGA / Reconfigurable Computing
An FPGA device that can accommodate multiple CPU cores, memory and a vast range of peripherals. For example, Altera supports NIOS-II, ARM-A9 embedded processor cores and Avalon bus that provides a set of pre-defined signals with which a user can connect one or more IP blocks including CPU cores, DMA controller, UART, memory controller and other peripherals. A dedicated multi-core System-on-Chip (SoC) can be easily developed and implemented by putting it on a single FPGA (e.g. Cyclone IV/V from Altera) for various high performance embedded applications.
To investigate, design and develop a multiple CPU and other cores based embedded SoPC (System on Programmable Chip) for embedded applications. The embedded applications ranging from MPEG-4, JPEG2000, MJPEG to complex systems that can be implemented on a Multi-core system.
1. Investigate and study bus-based on-chip systems.
2. Investigate and select an embedded application suitable for multi-core SoC implementation.
3. Study of the suitability of NIOS-II processor or ARM-A9 based SoPC platform.
4. Specify and partition the embedded application for multi-core SoC implementation.
5. Design and develop the Multicore SoC for the application and implement it on an FPGA platform.
1. Investigate and study Nios-II and/or ARM-SA9 processor architecture and programming model, specifically interrupt mechanism and other characteristics to support multi-core SoC implementation. Investigate the capabilities of processor and memory cores
2. Investigate and study some candidate embedded applications.
3. Study Altera Stratix/Cyclone IV/V FPGA based platform to be employed for embedded devices.
4. Investigate and study the results of research and development being conducted by various multi-core implementations of embedded application.
5. Select an embedded application and develop a detailed multi-core specification of the application.
7. Design, implement and prototype a SoC for the application using the Nios or A9 based SoPC.
1. Investigate and study Nios/ARM Cortex A9 processor architecture and programming model. 2. Study Stratix/Cyclone FPGA based embedded platforms. 3. Investigate the results of research and development being conducted by various research groups working on Multicore/SoC based embedded applications. 4. Develop a detailed specification of Multicore implementation of the embedded application. 5. Design, develop, implement and prototype the SoC for the application.
1. Study some candidate SoPC-based embedded platform. 2. Investigate and study the capabilities of CPU and Memory Cores. 3. Choose an embedded application suitable for multi-core implementation. 4. Design and write the application specification in a high level language e.g. SystemC or UML environment. 5. Assist Student A and C and manage the overall project design and implementation.
1. Study the suitability of SoC for embedded Applications. 2. Study some multi-core platform developed for embedded applications. 3. Partition the application for multi-core implementation working with Student A. 4. Write the embedded application code for Nios-II and/or ARM Cortex A9 CPU cores. 5. Assist Student A and C to manage the overall project design and implementation.
1. Study the suitability of SoPC for Embedded Applications. 2. Investigate some candidate Nios/Cortex-A9 processor-based embedded platforms. 3. Use the specification (developed by student A) and partitioning information (developed by student B) 4. Design, develop and implement an embedded computer hardware architecture (using the specification and consisting of Nios/Cortex-A9 CPU, Avalon/AMBA Bus, memory and peripheral IPs from Altera/ARM by using Quartus and DS-5 tools. 5. Assist Student A and B to manage the overall project design and implementation.
COE718, COE838
GK03: Multi-core System on Chip Design and FPGA Implementation for Embedded Devices | Gul Khan | Not yet submitted at No time