Farah Mohammadi
Consumer Products/Applications
Computational efficiency and energy consumption are primary concerns in learning systems. While Machine Learning (ML) algorithms enable new capabilities in visual search, signal processing, data mining, and other big-data applications, these algorithms are still very complex, and it can take many weeks to years to train with today’s computing platforms. While Multi-CPU and Mutli-GPU have driven much of the recent success in ML execution, researchers are also exploring other computing fabrics such as FPGAs and ASICs. In this study, we are going to work on neuromorphic hardware ASIC accelerators to improve the computational performance and power consumption.
The goal of this work is to propose and evaluate a neuromorphic architecture with a high power and computational efficiency (closer to that of ASICs). While there are architectures that attempt to achieve performance and scalability by reducing the processing unit, the overall system performance is often limited due to insufficient memory bandwidth and network latency. In the proposed neuromorphic architecture in this work, the memory and bandwidth wall problems will be investigated using a 3D processing-in-memory architecture.
-Architecting a neuromorphic architecture.
-Developing a 3D processing-in-memory architecture.
- Execution of ML workloads on the proposed neuromorphic architecture.
- Comparison of energy consumption and performance of the proposed neuromorphic architecture with the existing designs.
- A neuromorphic simulator should be installed.
1- Developing a 3D stacked Processing in Memory (PIM).
2- Developing a MAC (Multiplier-Adder Component) unit.
3- Installing a neuromorphic accelerator.
4- Simulating Neurocube as the neuromorphic accelerator.
5- Simulating a Heterogenous CPU-GPU platform for each ML technique.
- Literature review of ML algorithms
-Proposing an optimum architecture for each ML workload.
-Prepare a technical report and present the results at the end of the program.
-Implementing a 3D processing in memory (PIM) architecture.
-Simulation of the 3D PIM on the simulator.
-Implementing MAC architecture and connecting to a mesh topology.
-Simulation of the tile based MACs on the simulator.
-Integration of the 3D PIM and Meshed MACs to a neuromorphic accelerator.
-Simulation of the neuromorphic accelerator on the simulator.
-Validation of the integrated neuromorphic accelerator.
- Power, Performance, and Area Evaluation of the integrated neuromorphic accelerator.
Digital Systems, Programming in C, Microprocessors
FM03: Neurocube: A Neuromorphic Accelerator for Machine Learning Techniques | Farah Mohammadi | Sunday September 12th 2021 at 07:51 AM