AN ENERGY EFFICIENT DNN ACCELARATOR
Deep neural networks (DNNs) are currently widely used for many artificial intelligence (AI) applications including computer vision, speech recognition, and robotics. The hardware implemented by this project can accelerate efficiently DNN’s computation in future AI’s applications.
1) To derive the specifications of the Deep Neural Network’s based applications. 2) To design and develop an architecture for an energy efficient DNN accelerator. 3) To design an architecture for on-chip interconnection network for DNNs. 4) To design an architecture for memory hierarchy for DNNs. 5) Mapping the existing benchmark applications on the proposed architecture for the DNNs. 6) Coding the proposed architecture for the proposed DNN’s accelerator by VHDL. 7) Implementing the proposed DNN accelerator on a FPGA. 8) Comparing the proposed DNN accelerator with a general-purpose hardware.
C/C++. VHDL, VeriLog. Data Structures and Algorithm Design. Computer Architecture and Digital System Design.
To apply for this project you will need to login to the departmental web portal and select Research Internship from the sidebar menu.
Farah Mohammadi : AN ENERGY EFFICIENT DNN ACCELARATOR | Monday March 29th 2021 08:54 AM