RYERSON UNIVERSITY

Course Outline (W2020)

COE838: Systems-on-Chip Design

Instructor(s)Gul Khan [Coordinator]
Office: ENG448
Phone: (416) 979-5000 x 6084
Email: gnkhan@ryerson.ca
Office Hours: Thursday 12:10-2:00PM
Calendar DescriptionThis course will cover the basics of system-on-chip (SoC) design, hardware-software co- specification, co-synthesis and network-on-chip (NoC) systems. It provides the advance knowledge required for system-on-chip design, multi-core architectures and embedded systems on a chip. Students will also be introduced to the main principles of SoC modeling and design using SystemC. Various soft processor cores such as Nios-II and other IPs will be explored. Interconnection structures such as AMBA, Avalon and IBM Core-connect for SoC design will be covered in detail. Various SoC development tools will be utilized in the labs and projects.
PrerequisitesCOE 718 or ELE 734
Antirequisites

None

Corerequisites

None

Compulsory Text(s):
  1. D.C. Black, J Donovan, B. Bunton, A. Keist, SystemC: From the Ground Up, 2nd Edition, Springer 2010, ISBN 978-0-387-69958-5
  2. Michael J. Flynn, Wayne Luk, Computer System Design: System on Chip, John Wiley and Sons Inc. 2011, ISBN 978-0-470-64336-5 (Not-Compulsory)
Reference Text(s):
  1. M. Wolf, Computer as Components: Principles of Embedded Computing System Design, 3rd or 4th Edition, Morgan Kaufman Publishers 2016, ISBN 978-0-12-805387-4
  2. Some relevant review articles to be identified by the instructor and will be available at the course web page.
Learning Objectives (Indicators)  

At the end of this course, the successful student will be able to:

  1. Interconnect engineering concepts related to soft-processor cores, hardware and software systems to design an SoC for real-world applications. Learn to employ specialized knowledge of subsystems like processor cores and other SoC components to design an embedded SoC. (1c)
  2. Interconnect engineering concepts related to soft-processor cores, hardware and software systems to design an SoC for real-world applications. Learn to employ specialized knowledge of subsystems like processor cores and other SoC components to design an embedded SoC. (1d)
  3. Improve students' capabilities of using the technical knowledge of processor architecture, peripherals, programming, and CAD tools to design application specific SoCs. Solve various challenges of high performance SoC design in multiple stages by employing hardware/software co-design methodologies to test and verify each stage and then integrate different stages into an efficient SoC architecture. (4a), (4c)
  4. Learn and efficient use of different SoC simulation, modeling and prototyping tools including SystemC, QSys and Quartus-II. These tools facilitate co-simulation and co-design of SoCs. (5a)
  5. Demonstrate the main features of the course-project and answer critical and project specific questions during project demo and oral sessions. Write project report by following a standard IEEE like format, where all the lab and project reports are evaluated based on their completeness, English, and citations. (7a), (7b)

NOTE:Numbers in parentheses refer to the graduate attributes required by the Canadian Engineering Accreditation Board (CEAB).

Course Organization

3.0 hours of lecture per week for 13 weeks
1.0 hours of lab/tutorial per week for 12 weeks

Teaching AssistantsTBA
Course Evaluation
Theory
Midterm Exam 25 %
Final Exam 45 %
Laboratory
Labs with formal Reports 15 %
Project 15 %
TOTAL:100 %

Note: In order for a student to pass a course with "Theory and Laboratory" components, in addition to earning a minimum overall course mark of 50%, the student must pass the Laboratory and Theory portions separately by achieving a minimum of 50% in the combined Laboratory components and 50% in the combined Theory components. Please refer to the "Course Evaluation" section for details on the Theory and Laboratory components.


ExaminationsMidterm exam in Week 7, 1.5 hours, closed book (covers Weeks 1-6).
 Final exam, during exam period, two hours, closed-book (covers Weeks 1-13).
Other Evaluation InformationThere will be bonus (optional) project component carrying additional 3-5% marks.
Other InformationNone

Course Content

Week

Hours

Chapters /
Section

Topic, description

1

3

Introduction to System on Chip (SoC) An SoC Design Approach


2

3

Introduction to SystemC Using SystemC for SoC Co-specification


3

3

SystemC based Modeling and Analysis of SoCs


4

3

Hardware-Software Cosynthesis and Accelerators based Embedded System Design


5

3

Basics of Chips and SoC ICs


6

3

SoPC (System on Programmable Chips) and SoC Design


7

3

SoC Soft Cores Processors Mid-term Exam


8

3

Various Soft CPU Cores: ARM-A9 OpenRISC Leon4 OpenSPARC


9

3

SoC Interconnection - On-Chip Busses: AMBA Core-connect Avalon etc.


10

3

NoC (Network on Chip) based Interconnection
 Regular (Mesh Torus Tree etc.) and Application Specific NoC Topologies


11

3

Multi-core and MPSoC (Multiprocessor SoC) Architectures


12

3

SoC Application Case Studies (If time permits)


13

3

Catching up and Review


Laboratory/Tutorials/Activity Schedule

Week

Lab

Description

2

ENG412

Lab1: SystemC: Introduction and Tutorial.
       http://www.doulos.com/knowhow/systemc/
 

3

ENG412

Lab 2a: SystemC based Accelerator for SoC

4

ENG412

Lab 2b: JPEG Encoder/Decoder SoC Design using SystemC

5

ENG412

Lab 3: DE1-SoC Tutorial - Creating SoCs using FPGA and Hard A9
 Processor Systems

6

ENG412

Individual/Team Course Project Selection

7

ENG412

Lab4: Designing and Interfacing Custom IP with an FPGA/HPS System

8

ENG412

Summary: Project Approach (1-2 pages)

9

ENG412

Lab4 Completion and Demo

10

ENG412

Demo of Project Progress and Interim (project) Report

11

ENG412

Final Project Completion

12

ENG412

Final Project Demonstration

13

ENG412

Project Presentation and (Final) Report

Policies & Important Information:

  1. Students are required to obtain and maintain a Ryerson e-mail account for timely communications between the instructor and the students;
  2. Any changes in the course outline, test dates, marking or evaluation will be discussed in class prior to being implemented;
  3. Assignments, projects, reports and other deadline-bound course assessment components handed in past the due date will receive a mark of ZERO, unless otherwise stated. Marking information will be made available at the time when such course assessment components are announced.
  4. Refer to our Departmental FAQ page for information on common questions and issues at the following link: https://www.ee.ryerson.ca/guides/Student.Academic.FAQ.html.

Missed Classes and/or Evaluations

When possible, students are required to inform their instructors of any situation which arises during the semester which may have an adverse effect upon their academic performance, and must request any consideration and accommodation according to the relevant policies as far in advance as possible. Failure to do so may jeopardize any academic appeals.

  1. Health certificates - If a student misses the deadline for submitting an assignment, or the date of an exam or other evaluation component for health reasons, they should notify their instructor as soon as possible, and submit a Ryerson Student Health Certificate AND an Academic Consideration Request form within 3 working days of the missed date. Both documents are available at https://www.ryerson.ca/senate/forms/medical.pdf.. If you are a full-time or part-time degree student, then you submit your forms to your own program department or school;
  2. Religious, Aboriginal and Spiritual observance - If a student needs accommodation because of religious, Aboriginal or spiritual observance, they must submit a Request for Accommodation of Student Religious, Aboriginal and Spiritual Observance AND an Academic Consideration Request form within the first 2 weeks of the class or, for a final examination, within 2 weeks of the posting of the examination schedule. If the requested absence occurs within the first 2 weeks of classes, or the dates are not known well in advance as they are linked to other conditions, these forms should be submitted with as much lead time as possible in advance of the absence. Both documents are available at www.ryerson.ca/senate/forms/relobservforminstr.pdf. If you are a full-time or part-time degree student, then you submit the forms to your own program department or school;
  3. Academic Accommodation Support - Before the first graded work is due, students registered with the Academic Accommodation Support office (AAS - www.ryerson.ca/studentlearningsupport/academic-accommodation-support) should provide their instructors with an Academic Accommodation letter that describes their academic accommodation plan.

Academic Integrity

Ryerson's Policy 60 (the Academic Integrity policy) applies to all students at the University. Forms of academic misconduct include plagiarism, cheating, supplying false information to the University, and other acts. The most common form of academic misconduct is plagiarism - a serious academic offence, with potentially severe penalties and other consequences. It is expected, therefore, that all examinations and work submitted for evaluation and course credit will be the product of each student's individual effort (or an authorized group of students). Submitting the same work for credit to more than one course, without instructor approval, can also be considered a form of plagiarism.

Suspicions of academic misconduct may be referred to the Academic Integrity Office (AIO). Students who are found to have committed academic misconduct will have a Disciplinary Notation (DN) placed on their academic record (not on their transcript) and will normally be assigned one or more of the following penalties:

  1. A grade reduction for the work, ranging up to an including a zero on the work (minimum penalty for graduate work is a zero on the work);
  2. A grade reduction in the course greater than a zero on the work. (Note that this penalty can only be applied to course components worth 10% or less, and any additional penalty cannot exceed 10% of the final course grade. Students must be given prior notice that such a penalty will be assigned (e.g. in the course outline or on the assignment handout);
  3. An F in the course;
  4. More serious penalties up to and including expulsion from the University.

The unauthorized use of intellectual property of others, including your professor, for distribution, sale, or profit is expressly prohibited, in accordance with Policy 60 (Sections 2.8 and 2.10). Intellectual property includes, but is not limited to:

  1. Slides
  2. Lecture notes
  3. Presentation materials used in and outside of class
  4. Lab manuals
  5. Course packs
  6. Exams

For more detailed information on these issues, please refer to the Academic Integrity policy(https://www.ryerson.ca/senate/policies/pol60.pdf) and to the Academic Integrity Office website (https://www.ryerson.ca/academicintegrity/).

Important Resources Available at Ryerson

  1. The Library (https://library.ryerson.ca/) provides research workshops and individual assistance. Inquire at the Reference Desk on the second floor of the library, or go to library.ryerson.ca/guides/workshops
  2. Student Learning Support(https://www.ryerson.ca/studentlearningsupport) offers group-based and individual help with writing, math, study skills and transition support, and other issues.